| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA …, 2014 | 1300 | 2014 |
| A cloud-scale acceleration architecture AM Caulfield, ES Chung, A Putnam, H Angepat, J Fowers, M Haselman, ... 2016 49th Annual IEEE/ACM international symposium on microarchitecture …, 2016 | 654 | 2016 |
| Accelerating deep convolutional neural networks using specialized hardware K Ovtcharov, O Ruwase, JY Kim, J Fowers, K Strauss, ES Chung Microsoft Research Whitepaper 2, 2015 | 448 | 2015 |
| A 201.4 GOPS 496 mW real-time multi-object recognition processor with bio-inspired neural perception engine JY Kim, M Kim, S Lee, J Oh, K Kim, HJ Yoo IEEE Journal of Solid-State Circuits 45 (1), 32-45, 2009 | 149 | 2009 |
| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... IEEE Micro 35 (3), 10-22, 2015 | 118 | 2015 |
| A scalable high-bandwidth architecture for lossless compression on fpgas J Fowers, JY Kim, D Burger, S Hauck 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom …, 2015 | 101 | 2015 |
| Toward accelerating deep learning at scale using specialized hardware in the datacenter K Ovtcharov, O Ruwase, JY Kim, J Fowers, K Strauss, ES Chung 2015 IEEE Hot Chips 27 Symposium (HCS), 1-38, 2015 | 86 | 2015 |
| A 125 GOPS 583 mW network-on-chip based parallel processor with bio-inspired visual attention engine K Kim, S Lee, JY Kim, M Kim, HJ Yoo IEEE Journal of Solid-State Circuits 44 (1), 136-147, 2008 | 86 | 2008 |
| Bitwise competition logic for compact digital comparator JY Kim, HJ Yoo 2007 IEEE Asian Solid-State Circuits Conference, 59-62, 2007 | 73 | 2007 |
| A 320 mW 342 GOPS real-time dynamic object recognition processor for HD 720p video streams J Oh, G Kim, J Park, I Hong, S Lee, JY Kim, JH Woo, HJ Yoo IEEE journal of solid-state circuits 48 (1), 33-45, 2012 | 62 | 2012 |
| Familiarity based unified visual attention model for fast and robust object recognition S Lee, K Kim, JY Kim, M Kim, HJ Yoo Pattern Recognition 43 (3), 1116-1128, 2010 | 60 | 2010 |
| An 81.6 GOPS object recognition processor based on NoC and visual image processing memory D Kim, K Kim, JY Kim, S Lee, HJ Yoo 2007 IEEE Custom Integrated Circuits Conference, 443-446, 2007 | 49 | 2007 |
| Convolutional neural networks on hardware accelerators E Chung, K Strauss, K Ovtcharov, JY Kim, O Ruwase US Patent App. 14/754,367, 2016 | 47 | 2016 |
| Configurable clouds AM Caulfield, ES Chung, A Putnam, H Angepat, D Firestone, J Fowers, ... IEEE Micro 37 (3), 52-61, 2017 | 46 | 2017 |
| Solutions for real chip implementation issues of NoC and their application to memory-centric NoC D Kim, K Kim, JY Kim, SJ Lee, HJ Yoo First International Symposium on Networks-on-Chip (NOCS'07), 30-39, 2007 | 44 | 2007 |
| A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ... Communications of the ACM 59 (11), 114-122, 2016 | 40 | 2016 |
| 24-GOPS 4.5-Digital Cellular Neural Network for Rapid Visual Attention in an Object-Recognition SoC S Lee, M Kim, K Kim, JY Kim, HJ Yoo IEEE transactions on neural networks 22 (1), 64-73, 2010 | 35 | 2010 |
| 81.6 GOPS object recognition processor based on a memory-centric NoC D Kim, K Kim, JY Kim, S Lee, SJ Lee, HJ Yoo IEEE transactions on very large scale integration (VLSI) systems 17 (3), 370-383, 2009 | 31 | 2009 |
| A 0.6 pJ/b 3Gb/s/ch Transceiver in 0.18 μm CMOS for 10mm On-Chip Interconnects J Bae, JY Kim, HJ Yoo 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2861-2864, 2008 | 28 | 2008 |
| Low-power, real-time object-recognition processors for mobile vision systems J Oh, G Kim, I Hong, J Park, S Lee, JY Kim, JH Woo, HJ Yoo IEEE Micro 32 (6), 38-50, 2012 | 22 | 2012 |
Jeremy FowersGroqVerified email at groq.com
