Guido Araujo
Guido Araujo
IC-UNICAMP
E-mail confirmado em ic.unicamp.br - Página inicial
TítuloCitado porAno
The ArchC architecture description language and tools
R Azevedo, S Rigo, M Bartholomeu, G Araujo, C Araujo, E Barros
International Journal of Parallel Programming 33 (5), 453-484, 2005
1782005
ArchC: A SystemC-based architecture description language
S Rigo, G Araujo, M Bartholomeu, R Azevedo
16th Symposium on Computer Architecture and High Performance Computing, 66-73, 2004
1412004
Processor description languages: applications and methodologies
P Mishra, N Dutt
Morgan Kaufmann, 2008
119*2008
Efficient datapath merging for partially reconfigurable architectures
N Moreano, E Borin, C De Souza, G Araujo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1172005
Optimal code generation for embedded memory non-homogeneous register architectures
G Araujo, S Malik
Proceedings of the Eighth International Symposium on System Synthesis, 36-41, 1995
1051995
Software-based transparent and comprehensive control-flow error detection
E Borin, C Wang, Y Wu, G Araujo
Proceedings of the International Symposium on Code Generation and …, 2006
952006
Code compression based on operand factorization
G Araujo, P Centoducatte, M Cortes, R Pannain
Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998
771998
Using register-transfer paths in code generation for heterogeneous memory-register architectures
G Araujo, S Malik, MTC Lee
33rd Design Automation Conference Proceedings, 1996, 591-596, 1996
691996
An automatic testbench generation tool for a SystemC functional verification methodology
KRG Da Silva, EUK Melcher, G Araujo
Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems …, 2004
662004
Code generation algorithms for digital signal processors
GCS De Araujo
Princeton University, 1997
581997
Instruction set design and optimizations for address computation in DSP architectures
G Araujo, A Sudarsanam, S Malik
Proceedings of the 9th international symposium on System synthesis, 105, 1996
571996
Challenges in code generation for embedded processors
G Araujo, S Devadas, K Keutzer, S Liao
KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE, 48-48, 1995
44*1995
The design of dynamically reconfigurable datapath coprocessors
Z Huang, S Malik, N Moreano, G Araujo
ACM Transactions on Embedded Computing Systems (TECS) 3 (2), 361-384, 2004
402004
Probing the Casimir force with optical tweezers
DS Ether Jr, LB Pires, S Umrath, D Martinez, Y Ayala, B Pontes, ...
EPL (Europhysics Letters) 112 (4), 44001, 2015
362015
Exploring Memory Hierarchy with ArchC
P Viana, E Barros, S Rigo, R Azevedo, G Araújo
Computer Architecture and High Performance Computing, 2003. Proceedings …, 2003
342003
Datapath merging and interconnection sharing for reconfigurable architectures
N Moreano, G Araujo, Z Huang, S Malik
Proceedings of the 15th international symposium on System Synthesis, 38-43, 2002
342002
Expression-tree-based algorithms for code compression on embedded RISC architectures
G Araujo, P Centoducatte, R Azevedo, R Pannain
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 8 (5), 530-533, 2000
342000
An efficient framework for high-level power exploration
F Klein, G Araujo, R Azevedo, R Leao, LCV dos Santos
2007 50th Midwest Symposium on Circuits and Systems, 1046-1049, 2007
322007
A retargetable VLIW compiler framework for DSPs with instruction-level parallelism
S Rajagopalan, SP Rajan, S Malik, S Rigo, G Araujo, K Takayama
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001
292001
Code Generation for Fixed-Point DSPs
A Guido, M Sharad
27*
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