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Yong Cheol Peter Cho
Yong Cheol Peter Cho
ETRI, Pennsylvania State University
Verified email at etri.re.kr
Title
Cited by
Cited by
Year
An FPGA implementation of information theoretic visual-saliency system and its optimization
S Bae, YCP Cho, S Park, KM Irick, Y Jin, V Narayanan
2011 IEEE 19th Annual International Symposium on Field-Programmable Custom …, 2011
442011
Function-safe vehicular ai processor with nano core-in-memory architecture
Y Kwon, J Yang, YP Cho, KS Shin, J Chung, J Han, CG Lyuh, HM Kim, ...
2019 IEEE International Conference on Artificial Intelligence Circuits and …, 2019
172019
Exploring Gabor filter implementations for visual cortex modeling on FPGA
YCP Cho, S Bae, Y Jin, KM Irick, V Narayanan
2011 21st International Conference on Field Programmable Logic and …, 2011
172011
Apparatus for processing convolutional neural network using systolic array and method thereof
C Kim, YS Kwon, HM Kim, L Chun-Gi, YCP Cho, MS Choi, Y Jeongmin, ...
US Patent App. 16/204,599, 2019
152019
Implementation of Yolo-v2 image recognition and other testbenches for a CNN accelerator
C Kim, HM Kim, CG Lyuh, YCP Cho, J Yang, J Chung, KS Shin, JH Han, ...
2019 IEEE 9th International Conference on Consumer Electronics (ICCE-Berlin …, 2019
142019
Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems
S Advani, N Chandramoorthy, K Swaminathan, K Irick, YCP Cho, ...
2014 IEEE 32nd International Conference on Computer Design (ICCD), 501-504, 2014
112014
A reconfigurable platform for the design and verification of domain-specific accelerators
S Park, YCP Cho, KM Irick, V Narayanan
17th Asia and South Pacific Design Automation Conference, 108-113, 2012
9*2012
AB9: A neural processor for inference acceleration
YCP Cho, J Chung, J Yang, CG Lyuh, HM Kim, C Kim, J Ham, M Choi, ...
ETRI Journal 42 (4), 491-504, 2020
82020
A 1GHz fault tolerant processor with dynamic lockstep and self-recovering cache for ADAS SoC complying with ISO26262 in automotive electronics
J Han, Y Kwon, YCP Cho, HJ Yoo
2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 313-316, 2017
82017
Ai 32tflops autonomous driving processor on ai-ware with adaptive power saving
Y Kwon, YP Cho, J Yang, J Chung, KS Shin, J Han, C Kim, CG Lyuh, ...
2019 International SoC Design Conference (ISOCC), 174-175, 2019
52019
Accelerating multiresolution Gabor feature extraction for real time vision applications
YCP Cho, N Chandramoorthy, KM Irick, V Narayanan
Journal of Signal Processing Systems 76, 149-168, 2014
52014
Live demonstration: A neural processor for AI acceleration
H Kim, J Chung, K Shin, CG Lyuh, HM Kim, C Kim, YCP Cho, J Yang, ...
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-1, 2021
42021
Chiplet Heterogeneous-Integration AI Processor
Y Kwon, J Han, YP Cho, J Kim, J Chung, J Choi, S Park, I Kim, H Kwon, ...
2023 International Conference on Electronics, Information, and Communication …, 2023
32023
Method and apparatus for injecting fault and analyzing fault tolerance
CHO Yong-Cheol, YS Kwon
US Patent 10,489,520, 2019
32019
Multiresolution Gabor feature extraction for real time applications
YCP Cho, N Chandramoorthy, KM Irick, V Narayanan
2012 IEEE Workshop on Signal Processing Systems, 55-60, 2012
32012
Processing element and operating method thereof in neural network
YCP Cho, YS Kwon
US Patent 11,494,623, 2022
22022
Device for reorganizable neural network computing
YS Kwon, C Kim, HM Kim, Y Jeongmin, L Chun-Gi, J Chung, YCP Cho
US Patent App. 16/201,871, 2019
22019
M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations
W Jeon, YCP Cho, HM Kim, H Kim, J Chung, J Kim, M Lee, CG Lyuh, ...
2022 IEEE 4th International Conference on Artificial Intelligence Circuits …, 2022
12022
Ai accelerator, cache memory and method of operating cache memory using the same
HAN Jin-Ho, YS Kwon, MY Lee, J Lee, CHO Yong-Cheol
US Patent App. 17/544,224, 2022
12022
Neural network accelerator with systolic array structure
J Chung, YS Kwon, L Chun-Gi, C Kim, HM Kim, Y Jeongmin, YCP Cho
US Patent App. 16/677,835, 2020
12020
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