| SOI Schottky barrier nanowire MOSFET with reduced ambipolarity and enhanced electrostatic integrity A Saxena, M Kumar, RK Sharma, RS Gupta Journal of Electronic Materials 49, 4450-4456, 2020 | 11 | 2020 |
| Design of First Order Active Low Pass Filter using 22nm Gate All Around Silicon-on-Insulator Schottky Barrier MOSFET A Saxena, M Kumar, RK Sharma, RS Gupta 2021 International Conference on Industrial Electronics Research and …, 2021 | 3 | 2021 |
| Small signal model parameter extraction for cylindrical silicon-on-insulator Schottky barrier MOSFET A Saxena, M Kumar, RK Sharma, RS Gupta Microsystem Technologies 29 (4), 645-654, 2023 | 1 | 2023 |
| Linearity Investigation of Ultra-Low-Power Cylindrical SOI Schottky Barrier MOSFET for Biomedical and 5G/LTE Circuits Application A Saxena, RK Sharma, M Kumar, RS Gupta 2021 Devices for Integrated Circuit (DevIC), 363-367, 2021 | 1 | 2021 |
| Cylindrical SOI schottky barrier MOSFET with high linearity and low static power for digital and analog circuits application A Saxena, M Kumar, RK Sharma, RS Gupta International Journal of High Speed Electronics and Systems 30 (01n02), 2140003, 2021 | 1 | 2021 |
| Alignment of DNA sequence using the features of global and local algorithms along with matrices K Sharma, A Saxena, P Kumar Advanced Materials Research 403, 2012-2015, 2012 | 1 | 2012 |
| Algorithm Design for Generation of Fault Dictionary in Analog VLSI Circuits A Saxena, P Kumar, K Sharma, BK Kaushik 2010 International Conference on Advances in Recent Technologies in …, 2010 | 1 | 2010 |
| A new approach for testing CMOS circuits for glitches A Saxena, RP Agarwal, BK Kaushik, P Kumar, K Sharma 2010 International Conference On Computer Design and Applications 3, V3-595 …, 2010 | 1 | 2010 |
| Design of Low Power Analog/RF Signal Processing Circuits Using 22 nm Silicon-on-Insulator Schottky Barrier Nano-Wire MOSFET J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta International Journal of High Speed Electronics and Systems, 2450003, 2024 | | 2024 |
| RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies, 1-13, 2024 | | 2024 |
| Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications J Kumar, AN Mahajan, SS Deswal, A Saxena, RS Gupta Microsystem Technologies 29 (10), 1431-1442, 2023 | | 2023 |
