Sylvain Feruglio
Sylvain Feruglio
Maître de conférences, UPMC Paris 6
Verified email at - Homepage
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Impact of Mobility Boosters (XsSOI, CESL, TiN gate) on the Performance of< 100> or< 110> oriented FDSOI cMOSFETs for the 32nm Node
F Andrieu, O Faynot, F Rochette, JC Barbé, C Buj, Y Bogumilowicz, ...
2007 IEEE Symposium on VLSI Technology, 50-51, 2007
A review of the CMOS buried double junction (BDJ) photodetector and its applications
S Feruglio, GN Lu, P Garda, G Vasilescu
Sensors 8 (10), 6566-6594, 2008
A CMOS buried quad pn junction photodetector model
S Feruglio, T Courcier, O Tsiakaka, A Karami, A Alexandre-Gauthier, ...
IEEE Sensors Journal 16 (6), 1611-1620, 2015
FPGA implementation of reconfigurable ADPLL network for distributed clock generation
C Shan, E Zianbetov, M Javidan, F Anceau, M Terosiet, S Feruglio, ...
2011 International Conference on Field-Programmable Technology, 1-4, 2011
In-depth electrical characterization of sub-45 nm fully depleted strained SOI MOSFETs with TiN/HfO2 gate stack
S Feruglio, F Andrieu, O Faynot, G Ghibaudo
Solid-state electronics 52 (4), 489-497, 2008
A general model of the CMOS buried double junction photodetector
S Feruglio, F Haned, G Vasilescu, MB Chouikha, G Sou, VF Hanna, ...
2004 IEEE International Workshop on Imaging Systems and Techniques (IST …, 2004
Dark current and signal-to-noise ratio in BDJ image sensors
S Feruglio, VF Hanna, G Alquie, G Vasilescu
IEEE transactions on instrumentation and measurement 55 (6), 1892-1903, 2006
Noise characterization of CMOS image sensors
S Feruglio, A Pinna, C Chay, O Llopis, B Granado, A Alexandre, P Garda, ...
Proceedings of the 10th WSEAS international conference on Circuits, 102-107, 2006
Modelling of the CMOS buried double‐junction photodetector
S Feruglio, VF Hanna, G Alquie, G Vasilescu
Microwave and Optical Technology Letters 45 (6), 507-514, 2005
Exact noise analysis of a CMOS BDJ APS
S Feruglio, G Vasilescu, G Alquie, VF Hanna
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on …, 2005
Toward the monitoring of the spinal cord: A feasibility study
O Tsiakaka, S Feruglio
Microelectronics Journal 88, 145-153, 2019
Opto-electrical modeling of CMOS buried quad junction photodetector
S Feruglio, T Courcier, A Karami, A Alexandre-Gauthier, O Romain, ...
Key Engineering Materials 605, 470-473, 2014
Etude du Bruit dans les Capteurs d'Images Intégrés, type APS
S Feruglio
Paris 6, 2005
Source–Detector Spectral Pairing-Related Inaccuracies in Pulse Oximetry: Evaluation of the Wavelength Shift
O Tsiakaka, B Gosselin, S Feruglio
Sensors 20 (11), 3302, 2020
High level modeling of signal integrity in field bus communication with SystemC-AMS
R Wang, J Denoulet, S Feruglio, F Vallette, P Garda
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
An analytical model of the oscillation period for tri-state inverter based DCO
M Terosiet, S Feruglio, D Galayko, P Garcia
ICM 2011 Proceeding, 1-5, 2011
CMOS buried multi-junction (BMJ) detector for bio-chemical analysis
GN Lu, T Courcier, B Mamdy, S Feruglio, PG Charette, V Aimez, ...
AOPC 2015: Optical and Optoelectronic Sensing and Imaging Technology 9674 …, 2015
In vivo NIRS monitoring in pig Spinal Cord tissues
O Tsiakaka, M Terosiet, O Romain, A Histace, H Benali, PF Pradat, ...
2015 37th Annual International Conference of the IEEE Engineering in …, 2015
Investigation of electrical characteristics of multi-gate bulk nMOSFET
I Zbierska, L Militaru, F Calmon, S Feruglio, GN Lu
2014 29th International Conference on Microelectronics Proceedings-MIEL 2014 …, 2014
Modeling of signal integrity in bus communications with timed data flow SystemC-AMS
R Wang, J Denoulet, S Feruglio, F Vallette, P Garda
Proceedings of the 2013 Forum on specification and Design Languages (FDL), 1-6, 2013
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