Seguir
Alexandre S. Nery
Título
Citado por
Citado por
Ano
Preventing DNN model IP theft via hardware obfuscation
BF Goldstein, VC Patil, VC Ferreira, AS Nery, FMG França, S Kundu
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (2 …, 2021
252021
Gridrt: A massively parallel architecture for ray-tracing using uniform grids
AS Nery, N Nedjah, FMG Franca
Digital System Design, Architectures, Methods and Tools, 2009. DSD'09. 12th …, 2009
242009
Reliability evaluation of compressed deep learning models
BF Goldstein, S Srinivasan, D Das, K Banerjee, L Santiago, VC Ferreira, ...
2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 1-5, 2020
232020
A lightweight error-resiliency mechanism for deep neural networks
BF Goldstein, VC Ferreira, S Srinivasan, D Das, AS Nery, S Kundu, ...
2021 22nd International Symposium on Quality Electronic Design (ISQED), 311-316, 2021
122021
Automatic complex instruction identification for efficient application mapping onto ASIPs
AS Nery, N Nedjah, FMG França, L Jozwiak, H Corporaal
2014 IEEE 5th Latin American Symposium on Circuits and Systems, 1-4, 2014
122014
Hardware reuse in modern application-specific processors and accelerators
AS Nery, L Jóźwiak, M Lindwer, M Cocco, N Nedjah, FMG França
Microprocessors and Microsystems 37 (6-7), 684-692, 2013
112013
Two alternative parallel implementations for ray tracing: Openmp and mpi
AS Nery, N Nedjah, FMG França
Mecánica Computacional 29 (63), 6295-6302, 2010
112010
Massively parallel identification of intersection points for GPGPU ray tracing
AS Nery, N Nedjah, FMG Franca, L Jozwiak
International Conference on Algorithms and Architectures for Parallel …, 2011
102011
A parallel architecture for ray-tracing
AS Nery, N Nedjah, FMG França
2010 First IEEE Latin American Symposium on Circuits and Systems (LASCAS), 77-80, 2010
102010
A feasible fpga weightless neural accelerator
VC Ferreira, AS Nery, LAJ Marzulo, L Santiago, D Souza, BF Goldstein, ...
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019
92019
Efficient hardware implementation of Ray Tracing based on an embedded software for intersection computation
AS Nery, N Nedjah, FMG França
Journal of Systems Architecture 59 (3), 176-185, 2013
92013
An efficient parallel architecture for ray-tracing
AS Nery, N Nedjah, FMG França
Analog Integrated Circuits and Signal Processing 70, 189-202, 2012
92012
A massively parallel hardware architecture for ray-tracing
AS Nery, N Nedjah, FMG França
International Journal of High Performance Systems Architecture 2 (1), 26-34, 2009
92009
A CPU‐FPGA heterogeneous approach for biological sequence comparison using high‐level synthesis
CAC Jorge, AS Nery, ACMA Melo, A Goldman
Concurrency and Computation: Practice and Experience 33 (4), e6007, 2021
82021
DF‐DTM: Dynamic Task Memoization and reuse in dataflow
L Rouberte, AC Sena, AS Nery, LAJ Marzulo, TAO Alves, FMG França
Concurrency and Computation: Practice and Experience 31 (18), e4937, 2019
72019
A framework for automatic custom instruction identification on multi-issue ASIPs
AS Nery, N Nedjah, FMG França, L Jozwiak, H Corporaal
2014 12th IEEE International Conference on Industrial Informatics (INDIN …, 2014
72014
Efficient pathfinding co-processors for FPGAs
AS Nery, AC Sena, LS Guedes
2017 International Symposium on Computer Architecture and High Performance …, 2017
52017
A smart disk for in-situ face recognition
VC Ferreira, AS Nery, FMG França
2018 IEEE International Parallel and Distributed Processing Symposium …, 2018
42018
A parallel ray tracing architecture suitable for application-specific hardware and GPGPU implementations
AS Nery, N Nedjah, FMG Franca, L Jozwiak
2011 14th Euromicro Conference on Digital System Design, 511-518, 2011
42011
Parallel processing of intersections for ray-tracing in application-specific processors and GPGPUs
AS Nery, N Nedjah, FMG França, L Jóźwiak
Microprocessors and Microsystems 37 (6-7), 739-749, 2013
32013
O sistema não pode executar a operação agora. Tente novamente mais tarde.
Artigos 1–20