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Frank K. Gürkaynak
Frank K. Gürkaynak
Senior Scientist, ETH Zurich
Verified email at ee.ethz.ch - Homepage
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Cited by
Cited by
Year
Near-threshold RISC-V core with DSP extensions for scalable IoT endpoint devices
M Gautschi, PD Schiavone, A Traber, I Loi, A Pullini, D Rossi, E Flamand, ...
IEEE transactions on very large scale integration (VLSI) systems 25 (10 …, 2017
4942017
Power-analysis attack on an ASIC AES implementation
SB Ors, F Gurkaynak, E Oswald, B Preneel
International Conference on Information Technology: Coding and Computing …, 2004
3452004
Globally asynchronous, locally synchronous circuits: Overview and outlook
M Krstic, E Grass, FK Gürkaynak, P Vivet
IEEE Design & Test of computers 24 (5), 430-441, 2007
3002007
An IoT endpoint system-on-chip for secure and energy-efficient near-sensor analytics
F Conti, R Schilling, PD Schiavone, A Pullini, D Rossi, FK Gürkaynak, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (9), 2481-2494, 2017
1562017
Red team vs. blue team hardware trojan analysis: detection of a hardware trojan on an actual ASIC
M Muehlberghuber, FK Gürkaynak, T Korak, P Dunst, M Hutter
Proceedings of the 2nd International Workshop on Hardware and Architectural …, 2013
1152013
PULPino: A small single-core RISC-V SoC
A Traber, F Zaruba, S Stucki, A Pullini, G Haugou, E Flamand, ...
3rd RISCV Workshop, 15, 2016
992016
Efficient ASIC implementation of a real-time depth mapping stereo vision system
M Kuhn, S Moser, O Isler, FK Gurkaynak, A Burg, N Felber, H Kaeslin, ...
2003 46th Midwest Symposium on Circuits and Systems 3, 1478-1481, 2003
972003
A scalable near-memory architecture for training deep neural networks on large in-memory datasets
F Schuiki, M Schaffner, FK Gürkaynak, L Benini
IEEE Transactions on Computers 68 (4), 484-497, 2018
962018
Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers
C Keller, F Gürkaynak, H Kaeslin, N Felber
2014 IEEE international symposium on circuits and systems (ISCAS), 2740-2743, 2014
792014
A 60 gops/w,− 1.8 v to 0.9 v body bias ulp cluster in 28 nm utbb fd-soi technology
D Rossi, A Pullini, I Loi, M Gautschi, FK Gürkaynak, A Bartolini, ...
Solid-State Electronics 117, 170-184, 2016
782016
Breaking ecc2k-130
DV Bailey, L Batina, DJ Bernstein, P Birkner, JW Bos, HC Chen, ...
Cryptology EPrint Archive, 2009
762009
Self-timed ring for globally-asynchronous locally-synchronous systems
T Villiger, H Kaslin, FK Gurkaynak, S Oetiker, W Fichtner
Ninth International Symposium on Asynchronous Circuits and Systems, 2003 …, 2003
752003
Energy-efficient near-threshold parallel computing: The PULPv2 cluster
D Rossi, A Pullini, I Loi, M Gautschi, FK Gürkaynak, A Teman, ...
Ieee Micro 37 (5), 20-31, 2017
742017
Towards an AES crypto-chip resistant to differential power analysis
N Pramstaller, FK Gurkaynak, S Haene, H Kaeslin, N Felber, W Fichtner
Proceedings of the 30th European Solid-State Circuits Conference, 307-310, 2004
702004
GALS at ETH Zurich: Success or failure?
FK Gurkaynak, S Oetiker, H Kaeslin, N Felber, W Fichtner
12th IEEE International Symposium on Asynchronous Circuits and Systems …, 2006
582006
Arnold: An eFPGA-augmented RISC-V SoC for flexible and low-power IoT end nodes
PD Schiavone, D Rossi, A Di Mauro, FK Gürkaynak, T Saxe, M Wang, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (4), 677-690, 2021
562021
Developing a hardware evaluation method for SHA-3 candidates
L Henzen, P Gendotti, P Guillet, E Pargaetzi, M Zoller, FK Gürkaynak
Cryptographic Hardware and Embedded Systems, CHES 2010: 12th International …, 2010
552010
Approximate 32-bit floating-point unit design with 53% power-area product reduction
V Camus, J Schlachter, C Enz, M Gautschi, FK Gurkaynak
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 465-468, 2016
532016
193 MOPS/mW@ 162 MOPS, 0.32 V to 1.15 V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing
D Rossi, A Pullini, I Loi, M Gautschi, FK Gurkaynak, A Teman, ...
2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX), 1-3, 2016
492016
Improving DPA security by using globally-asynchronous locally-synchronous systems
F Gurkaynak, S Oetiker, H Kaeslin, N Felber, W Fichtner
Proceedings of the 31st European Solid-State Circuits Conference, 2005 …, 2005
462005
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