Edson Borin
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Efficient datapath merging for partially reconfigurable architectures
N Moreano, E Borin, C De Souza, G Araujo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1222005
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent 8,549,504, 2013
1152013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent 8,549,504, 2013
1102013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent 8,549,504, 2013
1102013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent App. 12/890,639, 2012
1102012
APPARATUS, METHOD, AND SYSTEM FOR PROVIDING A DECISION MECHANISM FOR CONDITIONAL COMMITS IN AN ATOMIC REGION
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles, B Jr., Mauricio
US Patent 20,120,079,246, 2012
1102012
Software-based transparent and comprehensive control-flow error detection
E Borin, C Wang, Y Wu, G Araujo
Proceedings of the International Symposium on Code Generation and …, 2006
942006
DYNAMIC OPTIMIZATION FOR CONDITIONAL COMMIT
C Wang, E Borin, Y Wu, S Hu, W Liu, M Breternitz Jr, Wang, Cheng
US Patent 20,120,079,245, 2012
552012
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
502014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
502014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
502014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
502014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent App. 13/046,031, 2012
502012
Dynamic parallelization of single-threaded binary programs using speculative slicing
C Wang, Y Wu, E Borin, S Hu, W Liu, D Sager, T Ngai, J Fang
Proceedings of the 23rd international conference on Supercomputing, 158-168, 2009
412009
Characterization of dynamic binary translation overhead
E Borin, Y Wu
1st Workshop on Architectural and Microarchitectural Support for Binary …, 0
39*
Compiler support for selective page migration in NUMA architectures
G Piccoli, HN Santos, RE Rodrigues, C Pousa, E Borin, ...
Proceedings of the 23rd international conference on Parallel architectures …, 2014
372014
Apparatus and method for software-based control flow checking for soft error detection to improve microprocessor reliability
E Borin, CC Wang, Y Wu
US Patent 7,506,217, 2009
352009
Characterization of DBT overhead
E Borin, Y Wu
Workload Characterization, 2009. IISWC 2009. IEEE International Symposium on …, 2009
332009
A Comparative Study of SYCL, OpenCL, and OpenMP
HC Da Silva, F Pisani, E Borin
Computer Architecture and High Performance Computing Workshops (SBAC-PADW …, 2016
252016
A HW/SW co-designed heterogeneous multi-core virtual machine for energy-efficient general purpose computing
Y Wu, S Hu, E Borin, C Wang
Proceedings of the 9th Annual IEEE/ACM International Symposium on Code …, 2011
242011
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