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Edson Borin
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Cited by
Year
Efficient datapath merging for partially reconfigurable architectures
N Moreano, E Borin, C De Souza, G Araujo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1402005
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent 8,549,504, 2013
1292013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent 8,549,504, 2013
1212013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent 8,549,504, 2013
1212013
Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles
US Patent App. 12/890,639, 2012
1212012
APPARATUS, METHOD, AND SYSTEM FOR PROVIDING A DECISION MECHANISM FOR CONDITIONAL COMMITS IN AN ATOMIC REGION
M Breternitz Jr, Y Wu, C Wang, E Borin, S Hu, CB Zilles, B Jr., Mauricio
US Patent 20,120,079,246, 2012
1212012
Software-based transparent and comprehensive control-flow error detection
E Borin, C Wang, Y Wu, G Araujo
Proceedings of the International Symposium on Code Generation and …, 2006
1092006
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
682014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
682014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
682014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent 8,683,243, 2014
682014
Dynamic core selection for heterogeneous multi-core systems
Y Wu, S Hu, E Borin, C Wang
US Patent App. 13/046,031, 2012
682012
DYNAMIC OPTIMIZATION FOR CONDITIONAL COMMIT
C Wang, E Borin, Y Wu, S Hu, W Liu, M Breternitz Jr, Wang, Cheng
US Patent 20,120,079,245, 2012
632012
The Multi-Lane Capsule Network (MLCN)
VM do Rosario, E Borin, M Breternitz Jr
61*
The Multi-Lane Capsule Network
VM do Rosario, E Borin, M Breternitz
IEEE Signal Processing Letters 26 (7), 1006-1010, 2019
572019
The Multi-Lane Capsule Network (MLCN)
VM Rosario, E Borin, M Breternitz Jr
arXiv preprint arXiv:1902.08431, 2019
57*2019
Compiler support for selective page migration in NUMA architectures
G Piccoli, HN Santos, RE Rodrigues, C Pousa, E Borin, ...
Proceedings of the 23rd international conference on Parallel architectures …, 2014
492014
Revisiting the functional bootstrap in TFHE
A Guimarães, E Borin, DF Aranha
IACR Transactions on Cryptographic Hardware and Embedded Systems, 229-253, 2021
472021
A Comparative Study of SYCL, OpenCL, and OpenMP
HC Da Silva, F Pisani, E Borin
Computer Architecture and High Performance Computing Workshops (SBAC-PADW …, 2016
472016
Characterization of dynamic binary translation overhead
E Borin, Y Wu
1st Workshop on Architectural and Microarchitectural Support for Binary …, 0
45*
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Articles 1–20