| Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation TE Carlson, W Heirman, L Eeckhout Proceedings of 2011 International Conference for High Performance Computing …, 2011 | 1143 | 2011 |
| An evaluation of high-level mechanistic core models TE Carlson, W Heirman, S Eyerman, I Hur, L Eeckhout ACM Transactions on Architecture and Code Optimization (TACO) 11 (3), 1-25, 2014 | 395 | 2014 |
| Rectified linear postsynaptic potential function for backpropagation in deep spiking neural networks M Zhang, J Wang, J Wu, A Belatreche, B Amornpaisannon, Z Zhang, ... IEEE transactions on neural networks and learning systems 33 (5), 1947-1958, 2021 | 184 | 2021 |
| Sampled simulation of multi-threaded applications TE Carlson, W Heirman, L Eeckhout 2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013 | 79 | 2013 |
| The load slice core microarchitecture TE Carlson, W Heirman, O Allam, S Kaxiras, L Eeckhout Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 76 | 2015 |
| Barrierpoint: Sampled simulation of multi-threaded applications TE Carlson, W Heirman, K Van Craeynest, L Eeckhout 2014 IEEE International Symposium on Performance Analysis of Systems and …, 2014 | 73 | 2014 |
| Sniper: Scalable and accurate parallel multi-core simulation W Heirman, T Carlson, L Eeckhout 8th International Summer School on Advanced Computer Architecture and …, 2012 | 70 | 2012 |
| Full speed ahead: Detailed architectural simulation at near-native speed A Sandberg, N Nikoleris, TE Carlson, E Hagersten, S Kaxiras, ... 2015 IEEE International Symposium on Workload Characterization, 183-192, 2015 | 67 | 2015 |
| Power-Performance Tradeoffs in Data Center Servers: DVFS, CPU pinning, Horizontal, and Vertical Scaling J Krzywda, A Ali-Eldin, TE Carlson, PO Ostberg, E Elmroth | 65 | 2017 |
| Analytical processor performance and power modeling using micro-architecture independent characteristics S Van den Steen, S Eyerman, S De Pestel, M Mechri, TE Carlson, ... IEEE Transactions on Computers 65 (12), 3537-3551, 2016 | 60 | 2016 |
| Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads W Heirman, TE Carlson, S Che, K Skadron, L Eeckhout 2011 IEEE International Symposium on Workload Characterization (IISWC), 38-49, 2011 | 59 | 2011 |
| Power-aware multi-core simulation for early design stage hardware/software co-optimization W Heirman, S Sarkar, TE Carlson, I Hur, L Eeckhout Proceedings of the 21st international conference on Parallel architectures …, 2012 | 55 | 2012 |
| Micro-architecture independent analytical processor performance and power modeling S Van den Steen, S De Pestel, M Mechri, S Eyerman, T Carlson, ... 2015 IEEE International Symposium on Performance Analysis of Systems and …, 2015 | 50 | 2015 |
| System-level power/performance evaluation of 3D stacked DRAMs for mobile applications M Facchini, T Carlson, A Vignon, M Palkovic, F Catthoor, W Dehaene, ... 2009 Design, Automation & Test in Europe Conference & Exhibition, 923-928, 2009 | 50 | 2009 |
| Undersubscribed Threading on Clustered Cache Architectures W Heirman, TE Carlson, K Van Craeynest, I Hur, A Jaleel, L Eeckhout The 20th IEEE International Symposium on High Performance Computer …, 2014 | 38 | 2014 |
| Long term parking (ltp) criticality-aware resource allocation in ooo processors A Sembrant, T Carlson, E Hagersten, D Black-Shaffer, A Perais, A Seznec, ... Proceedings of the 48th International Symposium on Microarchitecture, 334-346, 2015 | 35 | 2015 |
| Non-speculative load-load reordering in tso A Ros, TE Carlson, M Alipour, S Kaxiras ACM SIGARCH Computer Architecture News 45 (2), 187-200, 2017 | 34 | 2017 |
| Clairvoyance: Look-ahead compile-time scheduling KA Tran, TE Carlson, K Koukos, M Själander, V Spiliopoulos, S Kaxiras, ... 2017 IEEE/ACM International Symposium on Code Generation and Optimization …, 2017 | 34 | 2017 |
| Elasticlave: An efficient memory model for enclaves JZ Yu, S Shinde, TE Carlson, P Saxena 31st USENIX Security Symposium (USENIX Security 22), 4111-4128, 2022 | 24 | 2022 |
| Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study D Milojevic, TE Carlson, K Croes, R Radojcic, DF Ragett, D Seynhaeve, ... 2009 IEEE International Conference on 3D System Integration, 1-6, 2009 | 22 | 2009 |
Wim HeirmanResearcher, IntelVerified email at heirman.net
