| Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks BA Cuesta, A Ros, ME Gómez, A Robles, JF Duato Proceedings of the 38th annual international symposium on Computer …, 2011 | 219 | 2011 |
| Complexity-effective multicore coherence A Ros, S Kaxiras Proceedings of the 21st international conference on Parallel architectures …, 2012 | 165 | 2012 |
| Splash-3: A properly synchronized benchmark suite for contemporary research C Sakalis, C Leonardsson, S Kaxiras, A Ros 2016 IEEE International Symposium on Performance Analysis of Systems and …, 2016 | 152 | 2016 |
| Efficient invisible speculative execution through selective delay and value prediction C Sakalis, S Kaxiras, A Ros, A Jimborean, M Själander Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 132 | 2019 |
| System and method for simplifying cache coherence using multiple write policies S Kaxiras, A Ros US Patent 9,274,960, 2016 | 106 | 2016 |
| A new perspective for efficient virtual-cache coherence S Kaxiras, A Ros Proceedings of the 40th Annual International Symposium on Computer …, 2013 | 84 | 2013 |
| Turning centralized coherence and distributed critical-section execution on their head: A new approach for scalable distributed shared memory S Kaxiras, D Klaftenegger, M Norgren, A Ros, K Sagonas Proceedings of the 24th International Symposium on High-Performance Parallel …, 2015 | 64 | 2015 |
| A direct coherence protocol for many-core chip multiprocessors A Ros, ME Acacio, JM Garcia IEEE Transactions on Parallel and Distributed Systems 21 (12), 1779-1792, 2010 | 64 | 2010 |
| DiCo-CMP: Efficient cache coherency in tiled CMP architectures A Ros, ME Acacio, JM García 2008 IEEE International Symposium on Parallel and Distributed Processing, 1-11, 2008 | 63 | 2008 |
| Increasing the effectiveness of directory caches by avoiding the tracking of noncoherent memory blocks B Cuesta, A Ros, ME Gomez, A Robles, J Duato IEEE Transactions on Computers 62 (3), 482-495, 2011 | 47 | 2011 |
| Hierarchical private/shared classification: The key to simple and efficient coherence for clustered cache hierarchies A Ros, M Davari, S Kaxiras 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 45 | 2015 |
| Scalable Directory Organization for Tiled CMP Architectures. A Ros, ME Acacio, JM García CDES 8, 112-118, 2008 | 37 | 2008 |
| The entangling instruction prefetcher A Ros, A Jimborean IEEE Computer Architecture Letters 19 (2), 84-87, 2020 | 35 | 2020 |
| Ghost loads: What is the cost of invisible speculation? C Sakalis, M Alipour, A Ros, A Jimborean, S Kaxiras, M Själander Proceedings of the 16th ACM International Conference on Computing Frontiers …, 2019 | 35 | 2019 |
| Temporal-aware mechanism to detect private data in chip multiprocessors A Ros, B Cuesta, ME Gómez, A Robles, J Duato 2013 42nd International Conference on Parallel Processing, 562-571, 2013 | 35 | 2013 |
| Cache Coherence Protocols for Many-Core CMPs A Ros, ME Acacio, JM Garcıa Parallel and Distributed Computing, 93-118, 2010 | 35* | 2010 |
| Non-speculative load-load reordering in tso A Ros, TE Carlson, M Alipour, S Kaxiras ACM SIGARCH Computer Architecture News 45 (2), 187-200, 2017 | 34 | 2017 |
| Building heterogeneous unified virtual memories (uvms) without the overhead K Koukos, A Ros, E Hagersten, S Kaxiras ACM Transactions on Architecture and Code Optimization (TACO) 13 (1), 1-22, 2016 | 34 | 2016 |
| Callback: Efficient synchronization without invalidation with a directory just for spin-waiting A Ros, S Kaxiras Proceedings of the 42Nd Annual International Symposium on Computer …, 2015 | 33 | 2015 |
| Berti: an accurate local-delta data prefetcher A Navarro-Torres, B Panda, J Alastruey-Benedé, P Ibáñez, ... 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 975-991, 2022 | 32 | 2022 |
Stefanos KaxirasIEEE Fellow, Professor Uppsala UniversityVerified email at it.uu.se
