A flexible online checking technique to enhance hardware trojan horse detectability by reliability analysis RS Chakraborty, S Pagliarini, J Mathew, SR Rajendran, MN Devi IEEE Transactions on Emerging Topics in Computing 5 (2), 260-270, 2017 | 58 | 2017 |
Analyzing the impact of single-event-induced charge sharing in complex circuits S Pagliarini, F Kastensmidt, L Entrena, A Lindoso, E San Millan IEEE Transactions on Nuclear Science 58 (6), 2768-2775, 2011 | 51 | 2011 |
A survey on split manufacturing: Attacks, defenses, and challenges TD Perez, S Pagliarini IEEE Access 8, 184013-184035, 2020 | 48 | 2020 |
KaLi: A crystal for post-quantum security using Kyber and Dilithium A Aikata, AC Mert, M Imran, S Pagliarini, SS Roy IEEE Transactions on Circuits and Systems I: Regular Papers 70 (2), 747-758, 2022 | 47 | 2022 |
Selective hardening methodology for combinational logic SN Pagliarini, LAB Naviner, JF Naviner 2012 13th latin American test workshop (LATW), 1-6, 2012 | 44 | 2012 |
Constrained placement methodology for reducing SER under single-event-induced charge sharing effects L Entrena, A Lindoso, E San Millan, S Pagliarini, F Almeida, ... IEEE Transactions on Nuclear Science 59 (4), 811-817, 2012 | 40 | 2012 |
Latch-based logic locking J Sweeney, VM Zackriya, S Pagliarini, L Pileggi 2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020 | 35 | 2020 |
A fault tolerant approach to detect transient faults in microprocessors based on a non-intrusive reconfigurable hardware JR Azambuja, S Pagliarini, M Altieri, FL Kastensmidt, M Hubner, J Becker, ... IEEE Transactions on Nuclear Science 59 (4), 1117-1124, 2012 | 34 | 2012 |
A systematic study of lattice-based NIST PQC algorithms: From reference implementations to hardware accelerators M Imran, ZU Abideen, S Pagliarini arXiv preprint arXiv:2009.07091, 2020 | 33* | 2020 |
An oscillatory neural network with programmable resistive synapses in 28 nm CMOS T Jackson, S Pagliarini, L Pileggi 2018 IEEE International Conference on Rebooting Computing (ICRC), 1-7, 2018 | 28 | 2018 |
Exploring the limitations of software-based techniques in SEE fault coverage JR Azambuja, S Pagliarini, L Rosa, FL Kastensmidt Journal of Electronic Testing 27, 541-550, 2011 | 27 | 2011 |
Exploring the feasibility of selective hardening for combinational logic SN Pagliarini, GG dos Santos, LAB Naviner, JF Naviner Microelectronics Reliability 52 (9-10), 1843-1847, 2012 | 25 | 2012 |
Side-channel trojan insertion-a practical foundry-side attack via ECO T Perez, M Imran, P Vaz, S Pagliarini 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 24 | 2021 |
Hardware trojan insertion in finalized layouts: From methodology to a silicon demonstration TD Perez, S Pagliarini IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 20* | 2022 |
An open-source library of large integer polynomial multipliers M Imran, ZU Abideen, S Pagliarini 2021 24th International Symposium on Design and Diagnostics of Electronic …, 2021 | 20 | 2021 |
Design space exploration of saber in 65nm ASIC M Imran, F Almeida, J Raik, A Basso, SS Roy, S Pagliarini Proceedings of the 5th Workshop on Attacks and Solutions in Hardware …, 2021 | 19 | 2021 |
Ransomware attack as hardware trojan: A feasibility and demonstration study F Almeida, M Imran, J Raik, S Pagliarini IEEE Access 10, 44827-44839, 2022 | 18 | 2022 |
An Area Aware Accelerator for Elliptic Curve Point Multiplication M Imran, S Pagliarini, M Rashid | 18 | 2020 |
A pragmatic methodology for blind hardware trojan insertion in finalized layouts A Hepp, T Perez, S Pagliarini, G Sigl Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 14 | 2022 |
A probabilistic synapse with strained MTJs for spiking neural networks SN Pagliarini, S Bhuin, MM Isgenc, AK Biswas, L Pileggi IEEE Transactions on Neural Networks and Learning Systems 31 (4), 1113-1123, 2019 | 14 | 2019 |