Register file caching for energy efficiency H Zeng, K Ghose Proceedings of the 2006 international symposium on Low power electronics and …, 2006 | 33 | 2006 |
MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches H Zeng, M Yourst, K Ghose, D Ponomarev ACM SIGARCH Computer Architecture News 37 (2), 2-9, 2009 | 26 | 2009 |
MPTLsim: A simulator for X86 multicore processors H Zeng, M Yourst, K Ghose, D Ponomarev Proceedings of the 46th Annual Design Automation Conference, 226-231, 2009 | 23 | 2009 |
A precise trigger timing system SL HUANG, ZZ XU, ZM WANG, XL WANG, C Li, HF CHEN, J Wu, H Zeng Chinese Physics C 26 (9), 959-963, 2002 | 23 | 2002 |
A group-commit mechanism for ROB-based processors implementing the X86 ISA F Afram, H Zeng, K Ghose 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 14 | 2013 |
MARSSx86—Micro-Architectural and System Simulator for X86-Based Systems A Patel, F Afram, H Zeng, K Ghose | 7 | 2014 |
Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures H Zeng, K Ghose, D Ponomarev 2009 International Conference on Parallel Processing, 453-461, 2009 | 1 | 2009 |
An energy-efficient checkpointing mechanism for out of order commit processor H Zeng, MT Yourst, K Ghose Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009 | 1 | 2009 |
Energy-efficient renaming with register versioning H Zeng, JY Jung, K Ghose, D Ponomarev Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009 | | 2009 |
A Group-Commit Mechanism for ROB-Based Processors Implementing the F Afram, H Zeng, K Ghose | | |