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Ramanan Vaidyanathan
Ramanan Vaidyanathan
Unknown affiliation
Verified email at cisco.com
Title
Cited by
Cited by
Year
CONGA: Distributed congestion-aware load balancing for datacenters
M Alizadeh, T Edsall, S Dharmapurikar, R Vaidyanathan, K Chu, ...
Proceedings of the 2014 ACM conference on SIGCOMM, 503-514, 2014
8212014
Weighted equal cost multipath routing
S Dharmapurikar, MA Attar, N Yadav, R Vaidyanathan, KC Chu
US Patent 9,502,111, 2016
1172016
System and Method for Identification of Large-Data flows
US Patent 9,832,122, 0
63*
Fast invalidation for cache coherency in distributed shared memory system
I Akkawi, M Woodacre, B Chin, K Subramani, NI Ansari, CN Keltcher, ...
US Patent 7,613,882, 2009
512009
Block Caching for Cache-Coherent Distributed Shared Memory
I Akkawi, NI Ansari, B Chin, CN Keltcher, K Subramani, J Vaidyanathan
US Patent App. 11/959,758, 2011
442011
Register-sensitive software pipelining
AK Dani, VJ Ramanan, R Govindarajan
Proceedings of the First Merged International Parallel Processing Symposium …, 1998
341998
Detecting and resolving multicast traffic performance issues
L Sharpless, R Vaidyanathan, KM Swarnamanjunathan
US Patent 10,541,866, 2020
232020
Resource usage models for instruction scheduling: Two new models and a classification
VJ Ramanan, R Govindarajan
Proceedings of the 13th international conference on Supercomputing, 417-424, 1999
101999
Technologies for event based debugging of data center switching
R Vaidyanathan, A Modi, A Suleman, K Doddapaneni, S Dharmapurikar, ...
US Patent 10,142,168, 2018
52018
Resource usage modelling for software pipelining
VJ Ramanan, R Govindarajan
International Conference on High-Performance Computing, 111-119, 1999
11999
System and method for multi-path load balancing in network fabrics
MA Attar, TJ Edsall, SM Dharmapurikar, J Vaidyanathan
US Patent 10,778,584, 2020
2020
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