| Code compression based on operand factorization G Araujo, P Centoducatte, M Cortes, R Pannain Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998 | 80 | 1998 |
| Uma arquitetura de ambiente colaborativo para o aprendizado de programação CM Tobar, JLG Rosa, JMA Coello, R Pannain Brazilian Symposium on Computers in Education (Simpósio Brasileiro de …, 2001 | 52 | 2001 |
| Expression-tree-based algorithms for code compression on embedded RISC architectures G Araujo, P Centoducatte, R Azevedo, R Pannain IEEE transactions on very large scale integration (VLSI) systems 8 (5), 530-533, 2000 | 35 | 2000 |
| Compressed code execution on DSP architectures P Centoducatte, G Araujo, R Pannain Proceedings 12th International Symposium on System Synthesis, 56-61, 1999 | 17 | 1999 |
| Sparc16: A new compression approach for the sparc architecture LL Ecco, BC Lopes, EC Xavier, R Pannain, P Centoducatte, ... 2009 21st International Symposium on Computer Architecture and High …, 2009 | 11 | 2009 |
| Code compression using operand factorization G Araujo, P Centoducatte, M Cortes, R Pannain Proceedings of the International Symposium on Microarchitecture, 1998 | 5 | 1998 |
| Compressão de codigo de programa usando fatoração de operandos. R Pannain University of Campinas, Brazil, 1999 | 2 | 1999 |
| Organização básica de computadores e linguagem de montagem R Pannain, D Junior, FH Behrens Elsevier, 2012 | 1 | 2012 |
| Using operand factorization to compress DSP programs R Pannain, P Centoducatte, G Araujo Anais do XI Simpósio de Arquitetura de Computadores e Processamento de Alto …, 1999 | 1 | 1999 |
| DONUTS: Um Eficiente Método de Checkpointing em Memórias Não Voláteis K Kruger, R Azevedo, R Pannain Anais do XXII Simpósio em Sistemas Computacionais de Alto Desempenho, 120-131, 2021 | | 2021 |
| Bringing Energy Information to the Instruction Set B Bonotto, L Wanner, R Pannain, R Azevedo 2020 X Brazilian Symposium on Computing Systems Engineering (SBESC), 1-8, 2020 | | 2020 |
| DrPin: A dynamic binary instumentator for multiple processor architectures LF Antonioli, R Pannain, R Azevedo Anais do XXI Simpósio em Sistemas Computacionais de Alto Desempenho, 251-262, 2020 | | 2020 |
| Organização Básica de Computadores e Linguagem de Montagem D Junior, F Behrens, R Pannain Elsevier Brasil, 2013 | | 2013 |
| Concepcao de circuitos integrados: manual do aluno CIZ Mammana, R Pannain, JGM Taveira Rio de Janeiro, 1991 | | 1991 |
| Laboratorio de microelectronica: manual do aluno CIZ Mammana, R Pannain, JGM Taveira Buenos Aires, 1988 | | 1988 |
| Manual do aluno: laboratorio 3 CIZ Mammana, R Pannain, JGM Taveira Curitiba, 1988 | | 1988 |
| Processador DSP's TMS320C6x–VLIW R PANNAIN, ANAP MALHEIRO, FF MIRANDA, GB DOS SANTOS | | |
| Message from the General Chair Organizing Committee Technical Program Committee Acknowledgements J Menegazzo, A von Wangenheim, H Agarwal, R Dorociak, A Rettberg, ... | | |
| List of Accepted Papers J Menegazzo-jef, A von Wangenheim, H Agarwal-himanshu, ... | | |
Guido AraujoIC-UNICAMPVerified email at ic.unicamp.br
