| Power-efficient sum of absolute differences hardware architecture using adder compressors for integer motion estimation design B Silveira, G Paim, B Abreu, M Grellert, CM Diniz, EAC da Costa, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 64 (12), 3126-3137, 2017 | 72 | 2017 |
| Approximate pruned and truncated Haar discrete wavelet transform VLSI hardware for energy-efficient ECG signal processing HB Seidel, MMA da Rosa, G Paim, EAC da Costa, SJM Almeida, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 68 (5), 1814-1826, 2021 | 37 | 2021 |
| A cross-layer gate-level-to-application co-simulation for design space exploration of approximate circuits in HEVC video encoders G Paim, LMG Rocha, H Amrouch, EAC da Costa, S Bampi, J Henkel IEEE Transactions on Circuits and Systems for Video Technology 30 (10), 3814 …, 2019 | 33 | 2019 |
| An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs J Goebel, G Paim, L Agostini, B Zatt, M Porto 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2202-2205, 2016 | 25 | 2016 |
| Power-, area-, and compression-efficient eight-point approximate 2-D discrete tchebichef transform hardware design combining truncation pruning and efficient transposition buffers G Paim, LMG Rocha, GM Santana, LB Soares, EAC da Costa, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 680-693, 2018 | 24 | 2018 |
| On the resiliency of NCFET circuits against voltage over-scaling G Paim, G Zervakis, G Pahwa, YS Chauhan, EAC da Costa, S Bampi, ... IEEE Transactions on Circuits and Systems I: Regular Papers 68 (4), 1481-1492, 2021 | 18 | 2021 |
| Axppa: Approximate parallel prefix adders MMA da Rosa, G Paim, PÜL da Costa, EAC da Costa, RI Soares, S Bampi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (1), 17-28, 2022 | 15 | 2022 |
| Fixed-point NLMS and IPNLMS VLSI architectures for accurate FECG and FHR processing PÜ da Costa, G Paim, LMG Rocha, EAC da Costa, SJM de Almeida, ... IEEE Transactions on Biomedical Circuits and Systems 15 (5), 898-911, 2021 | 14 | 2021 |
| Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding B Silveira, B Abreu, G Paim, M Grellert, R Ferreira, C Diniz, E Costa, ... 2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017 | 14 | 2017 |
| Exploring NLMS-based adaptive filter hardware architectures for eliminating power line interference in EEG signals AB La Rosa, PTL Pereira, P Ücker, G Paim, EAC da Costa, S Bampi, ... Circuits, Systems, and Signal Processing 40, 3305-3337, 2021 | 13 | 2021 |
| Low power SATD architecture employing multiple sizes Hadamard transforms and adder compressors B Silveira, R Ferreira, G Paim, C Diniz, E Costa 2017 15th IEEE international new circuits and systems conference (NEWCAS …, 2017 | 13 | 2017 |
| Exploiting adder compressors for power-efficient 2-D approximate DCT realization T Schiavon, G Paim, M Fonseca, E Costa, S Almeida 2016 IEEE 7th Latin American symposium on circuits & systems (LASCAS), 383-386, 2016 | 13 | 2016 |
| Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider G Paim, P Marques, E Costa, S Almeida, S Bampi 2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017 | 12 | 2017 |
| Real-time architecture for HEVC motion compensation sample interpolator for UHD videos W Penny, G Paim, M Porto, L Agostini, B Zatt Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-6, 2015 | 12 | 2015 |
| Low‐power fast Fourier transform hardware architecture combining a split‐radix butterfly and efficient adder compressors G Ferreira, G Paim, LMG Rocha, GM Santana, RH Neuenfeld, EAC Costa, ... IET Computers & Digital Techniques 15 (3), 230-240, 2021 | 11 | 2021 |
| Optimizing iterative-based dividers for an efficient natural logarithm operator design P Ücker, MR Weirich, G Paim, EAC da Costa, S Bampi 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2020 | 11 | 2020 |
| Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding G Paim, GM Santana, BA Abreu, LMG Rocha, M Grellert, EAC da Costa, ... Journal of Real-Time Image Processing 17 (5), 1735-1754, 2020 | 10 | 2020 |
| A power-efficient 4-2 Adder Compressor topology R Dornelles, G Paim, B Silveira, M Fonseca, E Costa, S Bampi 2017 15th IEEE international new circuits and systems conference (NEWCAS …, 2017 | 10 | 2017 |
| Using adder compressors for power-efficient 2-D approximate Discrete Tchebichef Transform G Paim, E Costa 2016 14th IEEE international new circuits and systems conference (NEWCAS), 1-4, 2016 | 10 | 2016 |
| AppGNN: Approximation-aware functional reverse engineering using graph neural networks T Bücher, L Alrahis, G Paim, S Bampi, O Sinanoglu, H Amrouch Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 9 | 2022 |
Sergio BampiProfessor, Informatics Institute - Federal Univ. of Rio Grande do SulVerified email at inf.ufrgs.br
