| Reconfigurable routers for low power and high performance D Matos, C Concatto, M Kreutz, F Kastensmidt, L Carro, A Susin IEEE Transactions on very large scale integration (VLSI) systems 19 (11 …, 2010 | 62 | 2010 |
| A new reconfigurable clock-gating technique for low power SRAM-based FPGAs L Sterpone, L Carro, D Matos, S Wong, F Fakhar 2011 Design, Automation & Test in Europe, 1-6, 2011 | 39 | 2011 |
| Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router C Concatto, D Matos, L Carro, F Kastensmidt, A Susin, E Cota, M Kreutz Proceedings of the 22nd Annual Symposium on Integrated Circuits and System …, 2009 | 23 | 2009 |
| Noc power optimization using a reconfigurable router C Concatto, D Matos, L Carro, F Kastensmidt, A Susin, M Kreutz 2009 IEEE Computer Society Annual Symposium on VLSI, 235-240, 2009 | 21 | 2009 |
| Adaptive router architecture based on traffic behavior observability D Matos, C Concatto, A Kologeski, L Carro, F Kastensmidt, A Susin, ... Proceedings of the 2nd international Workshop on Network on Chip …, 2009 | 16 | 2009 |
| Performance evaluation of hierarchical NoC topologies for stacked 3D ICs D Matos, M Prass, M Kreutz, L Carro, A Susin 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1961-1964, 2015 | 15 | 2015 |
| Network interface to synchronize multiple packets on NoC-based Systems-on-Chip D Matos, M Costa, L Carro, A Susin 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 31-36, 2010 | 15 | 2010 |
| Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip D Matos, G Palermo, V Zaccaria, C Reinbrecht, A Susin, C Silvano, ... Proceedings of the 4th International Workshop on Network on Chip …, 2011 | 14 | 2011 |
| ERA–Embedded Reconfigurable Architectures S Wong, L Carro, M Rutzig, DM Matos, R Giorgi, N Puzovic, S Kaxiras, ... Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, 239-259, 2011 | 12 | 2011 |
| Floorplan-aware hierarchical NoC topology with GALS interfaces D Matos, C Reinbrecht, G Palermo, J Martinelli, A Susin, C Silvano, ... 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 652-655, 2012 | 8 | 2012 |
| Combining fault tolerance and serialization effort to improve yield in 3D networks-on-chip A Kologeski, C Concatto, D Matos, D Grehs, T Motta, F Almeida, ... 2013 IEEE 20th International Conference on Electronics, Circuits, and …, 2013 | 7 | 2013 |
| Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs D Matos, L Carro, A Susin Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 7 | 2010 |
| A NOC closed-loop performance monitor and adapter D Matos, C Concatto, A Kologeski, L Carro, M Kreutz, F Kastensmidt, ... Microprocessors and Microsystems 37 (6-7), 661-671, 2013 | 6 | 2013 |
| A fully dynamic reconfigurable noc-based mpsoc: The advantages of total reconfiguration PC Santos, GL Nazar, F Anjam, S Wong, D Matos, L Carro 7th HiPEAC Workshop on Reconfigurable Computing, Berlin, Germany, 2013 | 6 | 2013 |
| Monitor-adapter coupling for NOC performance tuning D Matos, C Concatto, A Kologeski, L Carro, F Kastensmidt, A Susin, ... 2010 International Conference on Embedded Computer Systems: Architectures …, 2010 | 6 | 2010 |
| A power-efficient hierarchical network-on-chip topology for stacked 3D ICs D Matos, C Reinbrecht, T Motta, A Susin 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration …, 2013 | 5 | 2013 |
| The need for reconfigurable routers in Networks-on-Chip D Matos, C Concatto, L Carro, F Kastensmidt, A Susin Reconfigurable Computing: Architectures, Tools and Applications: 5th …, 2009 | 5 | 2009 |
| Architectural exploration of last-level caches targeting homogeneous multicore systems R Cataldo, G Korol, R Fernandes, D Matos, C Marcon 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016 | 4 | 2016 |
| Embedded reconfigurable computing: the ERA approach G Keramidas, S Wong, F Anjam, A Brandon, R Seedorf, C Scordino, ... 2013 11th IEEE International Conference on Industrial Informatics (INDIN …, 2013 | 3 | 2013 |
| Hierarchical and multiple switching NoC with floorplan based adaptability D Matos, C Reinbrecht, M Kreutz, G Palermo, L Carro, A Susin Reconfigurable Computing: Architectures, Tools and Applications: 9th …, 2013 | 3 | 2013 |
Luigi CarroFull Professor, Instituto de InformaticaE-mail confirmado em inf.ufrgs.br
