| Common fabrication of different semiconductor devices with different threshold voltages H Kim, K Choi, JY Lee US Patent App. 14/134,358, 2015 | 321 | 2015 |
| Alternate state variables for emerging nanoelectronic devices K Galatsis, A Khitun, R Ostroumov, KL Wang, WR Dichtel, E Plummer, ... IEEE transactions on Nanotechnology 8 (1), 66-75, 2008 | 59 | 2008 |
| Sub-10-9 Ω.cm2 Contact Resistivity on p-SiGe Achieved by Ga Doping and Nanosecond Laser Activation NH J-L. Everaert, M. Schaekers, H. Yu1, L.-L. Wang, A. Hikavyy, L. Date, J ... Symposium on VLSI Technology Digest of Technical Papers., 2017 | 36* | 2017 |
| Comprehensive study of Ga activation in Si, SiGe and Ge with 5 × 10−10Ω·cm2contact resistivity achieved on Ga doped Ge using nanosecond laser activation LL Wang, H Yu, M Schaekers, JL Everaert, A Franquet, B Douhard, L Date, ... 2017 IEEE International Electron Devices Meeting (IEDM), 22.4. 1-22.4. 4, 2017 | 31 | 2017 |
| Fabrication and field emission study of atomically sharp high-density tungsten nanotip arrays K Sun, JY Lee, B Li, W Liu, C Miao, YH Xie, X Wei, TP Russell Journal of Applied Physics 108 (3), 2010 | 22 | 2010 |
| Field emission tip array fabrication utilizing geometrical hindrance in the oxidation of Si K Sun, W Zhang, B Li, JY Lee, YH Xie, T Schroeder, J Katzer, X Wei, ... IEEE transactions on nanotechnology 11 (5), 999-1003, 2012 | 15 | 2012 |
| Multiple-level threshold switching behavior of In2Se3 confined in a nanostructured silicon substrate JY Lee, K Sun, B Li, YH Xie, X Wei, TP Russell Applied Physics Letters 97 (9), 2010 | 13 | 2010 |
| A method to fabricate a template with a long range ordered dense array of true nanometer scale pits JY Lee, K Sun, B Li, X Wei, T Russell, YH Xie IEEE transactions on nanotechnology 10 (2), 256-259, 2010 | 3 | 2010 |
| Scalability of phase change materials in nano-structure template SJCYHX Wei Zhang, Biyun Jackson, Ke Sun, Jae Young Lee, S.-J. Huang, Hsin ... International Journal of Photoenergy., 2015 | 2 | 2015 |
| Fabrication of dislocation-free Si films under uniaxial tension on porous Si compliant substrates J Kim, JY Lee, YH Xie Thin solid films 516 (21), 7599-7603, 2008 | 1 | 2008 |
| Field Emission Tip Array Fabrication Utilizing Geometrical Hindrance in the Oxidation of Si W Zhang, K Sun, B Li, JY Lee, YH Xie, J Katzer, T Schroeder, X Wei, ... | | 2012 |
| 10.5: Field emission properties of atomically sharp tungsten nanotip arrays fabricated by a novel nanocasting method K Sun, JY Lee, B Li, C Miao, W Liu, YH Xie, X Wei, TP Russell International Vacuum Nanoelectronics Conference, 205-206, 2010 | | 2010 |
| 3-D Finite Element Simulation of a Phase-change Random Access Memory Cell with a Self-insulated Structure K Sun, W Feng, JY Lee, B Li, YH Xie MRS Online Proceedings Library (OPL) 1108, 1108-A11-04, 2008 | | 2008 |
| Replacement Gate Formation with Angled Etch and Deposition US Patent US10403552B1, 0 | | |
| Method of forming transistor device having fin cut regions US Patent US20190273011A1, 0 | | |
| Structure and method of forming device having improved isolation oxide US Patent US20190259859A1, 0 | | |
| Techniques for forming isolation structures in substrate US Patent US 10,090,166, 0 | | |
