Last-level cache side-channel attacks are practical F Liu, Y Yarom, Q Ge, G Heiser, RB Lee 2015 IEEE symposium on security and privacy, 605-622, 2015 | 1411 | 2015 |
CATalyst: Defeating Last-Level Cache Side Channel Attacks in Cloud Computing F Liu, Q Ge, Y Yarom, F Mckeen, C Rozas, G Heiser, RB Lee IEEE International Symposium on High Performance Computer Architecture (HPCA …, 2016 | 520 | 2016 |
Random fill cache architecture F Liu, RB Lee 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 203-215, 2014 | 324 | 2014 |
Compact optical temporal differentiator based on silicon microring resonator F Liu, T Wang, L Qiang, T Ye, Z Zhang, M Qiu, Y Su Optics Express 16 (20), 15880-15886, 2008 | 275 | 2008 |
Newcache: Secure Cache Architecture Thwarting Cache Side-Channel Attacks F Liu, H Wu, K Mai, RB Lee IEEE Micro 36 (5), 8-16, 2016 | 147 | 2016 |
Mapping the Intel last-level cache Y Yarom, Q Ge, F Liu, RB Lee, G Heiser Cryptology ePrint Archive, 2015 | 143 | 2015 |
Optically tunable delay line in silicon microring resonator based on thermal nonlinear effect F Liu, Q Li, Z Zhang, M Qiu, Y Su IEEE Journal of Selected Topics in Quantum Electronics 14 (3), 706-712, 2008 | 91 | 2008 |
Speculative interference attacks: Breaking invisible speculation schemes M Behnia, P Sahu, R Paccagnella, J Yu, ZN Zhao, X Zou, T Unterluggauer, ... Proceedings of the 26th ACM International Conference on Architectural …, 2021 | 81 | 2021 |
Side channel vulnerability metrics: the promise and the pitfalls T Zhang, F Liu, S Chen, RB Lee Proceedings of the 2nd International Workshop on Hardware and Architectural …, 2013 | 52 | 2013 |
Leveraging Hardware Transactional Memory for Cache Side-Channel Defenses S Chen, F Liu, Z Mi, Y Zhang, RB Lee, H Chen, XF Wang Proceedings of the 2018 on Asia Conference on Computer and Communications …, 2018 | 48 | 2018 |
Security testing of a secure cache design F Liu, RB Lee Proceedings of the 2nd International Workshop on Hardware and Architectural …, 2013 | 39 | 2013 |
On-chip photonic generation of ultra-wideband monocycle pulses F Liu, T Wang, Z Zhang, M Qiu, Y Su Electronics letters 45 (24), 1247-1249, 2009 | 33 | 2009 |
DPSK/FSK hybrid modulation format and analysis of its nonlinear performance F Liu, Y Su Journal of Lightwave Technology 26 (3), 357-364, 2008 | 21 | 2008 |
Systems and methods for random fill caching and prefetching for secure cache memories RB Lee, F Liu US Patent 10,956,617, 2021 | 15 | 2021 |
Cachefx: A framework for evaluating cache security D Genkin, W Kosasih, F Liu, A Trikalinou, T Unterluggauer, Y Yarom Proceedings of the 2023 ACM Asia Conference on Computer and Communications …, 2023 | 12 | 2023 |
Can randomized mapping secure instruction caches from side-channel attacks? F Liu, H Wu, RB Lee Proceedings of the Fourth Workshop on Hardware and Architectural Support for …, 2015 | 11 | 2015 |
Chameleon Cache: Approximating Fully Associative Caches with Random Replacement to Prevent Contention-Based Cache Attacks T Unterluggauer, A Harris, S Constable, F Liu, C Rozas 2022 IEEE International Symposium on Secure and Private Execution …, 2022 | 8 | 2022 |
Cloud server benchmark suite for evaluating new hardware architectures H Wu, F Liu, RB Lee IEEE Computer Architecture Letters 16 (1), 14-17, 2016 | 6 | 2016 |
Apparatus and method for non-speculative resource deallocation F Liu, C Rozas, T Unterluggauer, F McKeen, A Alameldeen, A Basak, ... US Patent App. 16/728,815, 2021 | 5 | 2021 |
Processor instruction support for mitigating controlled-channel and cache-based side-channel attacks S Constable, F Liu, B Xing, M Steiner, M Vij, C Rozas, FX McKeen, ... US Patent App. 16/458,015, 2020 | 5 | 2020 |