| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 246 | 2020 |
| SPKM: A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures JW Yoon, A Shrivastava, S Park, M Ahn, R Jeyapaul, Y Paek 2008 Asia and south pacific design automation conference, 776-782, 2008 | 67 | 2008 |
| Quantitative analysis of control flow checking mechanisms for soft errors A Shrivastava, A Rhisheekesan, R Jeyapaul, CJ Wu Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 52 | 2014 |
| An ant colony optimization–based approach for a single-product flow-line reconfigurable manufacturing systems M Maniraj, V Pakkirisamy, R Jeyapaul Proceedings of the Institution of Mechanical Engineers, Part B: Journal of …, 2017 | 36 | 2017 |
| gemV: A validated toolset for the early exploration of system reliability K Tanikella, Y Koy, R Jeyapaul, K Lee, A Shrivastava 2016 IEEE 27th International Conference on Application-specific Systems …, 2016 | 28 | 2016 |
| Cache vulnerability equations for protecting data in embedded processor caches from soft errors A Shrivastava, J Lee, R Jeyapaul ACM Sigplan Notices 45 (4), 143-152, 2010 | 24 | 2010 |
| A software scheme for multithreading on CGRAs J Pager, R Jeyapaul, A Shrivastava ACM Transactions on Embedded Computing Systems (TECS) 14 (1), 1-26, 2015 | 22 | 2015 |
| LASER: A hardware/software approach to accelerate complicated loops on CGRAs M Balasubramanian, S Dave, A Shrivastava, R Jeyapaul 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 21 | 2018 |
| Control flow checking or not?(for soft errors) A Rhisheekesan, R Jeyapaul, A Shrivastava ACM Transactions on Embedded Computing Systems (TECS) 18 (1), 1-25, 2019 | 20 | 2019 |
| Guidelines to design parity protected write-back L1 data cache Y Ko, R Jeyapaul, Y Kim, K Lee, A Shrivastava Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 19 | 2015 |
| UnSync-CMP: Multicore CMP architecture for energy-efficient soft-error reliability R Jeyapaul, F Hong, A Rhisheekesan, A Shrivastava, K Lee IEEE Transactions on Parallel and Distributed Systems 25 (1), 254-263, 2013 | 17 | 2013 |
| Enabling multithreading on CGRAs A Shrivastava, J Pager, R Jeyapaul, M Hamzeh, S Vrudhula 2011 International Conference on Parallel Processing, 255-264, 2011 | 15 | 2011 |
| Smart cache cleaning: Energy efficient vulnerability reduction in embedded processors R Jeyapaul, A Shrivastava Proceedings of the 14th international conference on Compilers, architectures …, 2011 | 14 | 2011 |
| Protecting caches from soft errors: A microarchitect’s perspective Y Ko, R Jeyapaul, Y Kim, K Lee, A Shrivastava ACM Transactions on Embedded Computing Systems (TECS) 16 (4), 1-28, 2017 | 13 | 2017 |
| The gem5 simulator: Version 20.0+. CoRR abs/2007.03152 (2020) J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 11 | 2020 |
| UnSync: A soft error resilient redundant multicore architecture R Jeyapaul, F Hong, A Rhisheekesan, A Shrivastava, K Lee 2011 International Conference on Parallel Processing, 632-641, 2011 | 10 | 2011 |
| Towards resilient EU HPC systems: A blueprint P Radojkovic, M Marazakis, P Carpenter, R Jeyapaul, D Gizopoulos, ... European HPC resilience initiative, 2020 | 9 | 2020 |
| Enabling energy efficient reliability in embedded systems through smart cache cleaning R Jeyapaul, A Shrivastava ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4 …, 2013 | 9 | 2013 |
| Code transformations for TLB power reduction R Jeyapaul, A Shrivastava International journal of parallel programming 38, 254-276, 2010 | 9 | 2010 |
| Hybrid and efficient approach to accelerate complicated loops on coarse-grained reconfigurable arrays (cgra) accelerators M Balasubramanian, S Dave, A Shrivastava, R Jeyapaul US Patent App. 16/172,254, 2020 | 6 | 2020 |
Aviral ShrivastavaArizona State UniversityE-mail confirmado em asu.edu
