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Bruno Endres Forlin
Bruno Endres Forlin
PhD Candidate University of Twente
E-mail confirmado em utwente.nl - Página inicial
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Earthquake—A NoC-based optimized differential cache-collision attack for MPSoCs
C Reinbrecht, B Forlin, A Zankl, J Sepúlveda
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 648-653, 2018
172018
Guard-NoC: A protection against side-channel attacks for MPSoCs
C Reinbrecht, A Aljuffri, S Hamdioui, M Taouil, B Forlin, J Sepulveda
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 536-541, 2020
132020
Cache timing attacks on NoC-based MPSoCs
C Reinbrecht, B Forlin, J Sepúlveda
Microprocessors and Microsystems 66, 1-9, 2019
112019
Sim2pim: A fast method for simulating host independent & pim agnostic designs
PC Santos, BE Forlin, L Carro
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 226-231, 2021
102021
Sim2PIM: A complete simulation framework for processing-in-memory
BE Forlin, PC Santos, AE Becker, MAZ Alves, L Carro
Journal of Systems Architecture 128, 102528, 2022
92022
Providing Plug N'Play for Processing-in-Memory Accelerators
PC Santos, BE Forlin, L Carro
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
92021
Neutron radiation tests of the neorv32 risc-v soc on flash-based fpgas
K Böhmer, B Forlin, C Cazzaniga, P Rech, G Furano, N Alachiotis, ...
2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2023
62023
G-puf: An intrinsic puf based on GPU error signatures
B Forlin, R Husemann, L Carro, C Reinbrecht, S Hamdioui, M Taouil
2020 IEEE European Test Symposium (ETS), 1-2, 2020
62020
Earthquake—a NoC-based optimized differential cache-collision attack for MPSoCs, in 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
C Reinbrecht, B Forlin, A Zankl, J Sepúlveda
IEEE, Piscataway, 2018
52018
An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds?
BE Forlin, W Van Huffelen, C Cazzaniga, P Rech, N Alachiotis, M Ottavi
2023 IEEE European Test Symposium (ETS), 1-6, 2023
32023
Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC
M Rogenmoser, P Wiese, BE Forlin, FK Gürkaynak, P Rech, A Menicucci, ...
arXiv preprint arXiv:2407.05938, 2024
22024
Attacking real-time mpsocs: Preemptive nocs are vulnerable
B Forlin, C Reinbrecht, J Sepúlveda
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
22019
Neutron Beam Evaluation of Probabilistic Data Structure-based Online Checkers
B Forlin, EB Annink, E Cishugi, C Cazzaniga, P Rech, G Rauwerda, ...
2024 IEEE 30th International Symposium on On-Line Testing and Robust System …, 2024
12024
Security aspects of real-time MPSoCs: the flaws and opportunities of preemptive NoCs
B Forlin, C Reinbrecht, J Sepúlveda
VLSI-SoC: New Technology Enabler: 27th IFIP WG 10.5/IEEE International …, 2020
12020
From Ground to Orbit: A Robust and Efficient Test Methodology for RISC-V Soft-Cores
B Forlin, K Böhmer, C Cazzaniga, P Rech, G Furano, N Alachiotis, ...
IEEE Transactions on Device and Materials Reliability, 2025
2025
FPGA Innovation Research in the Netherlands: Present Landscape and Future Outlook
N Alachiotis, S Belt, S van der Vlugt, R van der Walle, M Safari, BE Forlin, ...
arXiv preprint arXiv:2502.02404, 2025
2025
An Enhanced Fault Injection Framework for FPGA-Based Soft-Cores
TT Smit, BE Forlin, KH Chen, I Souvatzoglou, M Psarakis, M Ottavi
2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2024
2024
An experimental comparison of RISC-V processors: performance, power, area and security-Special Session Paper
E Lazzeri, BE Forlin, G Furano, M Ottavi, L Cassano
2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2024
2024
Lightweight Instrumentation for Accurate Performance Monitoring in RTOSes
B Forlin, KH Chen, N Alachiotis, L Cassano, M Ottavi
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2024
2024
36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
M Ottavi, G Furano, L Cassano, M Psarakis, L Dilillo, P Reviriego, S Liu, ...
2023
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