| 3-D LER and RDF Matching Performance of Nanowire- FETs in Inversion, Accumulation, and Junctionless-modes AK Bansal, C Gupta, A Gupta, R Singh, TB Hook, A Dixit IEEE Transactions on Electron Devices, 2018 | 37 | 2018 |
| Series resistance reduction in stacked nanowire FETs for 7-nm CMOS technology AK Bansal, I Jain, TB Hook, A Dixit IEEE Journal of the Electron Devices Society 4 (5), 266-272, 2016 | 35 | 2016 |
| Series Resistance Reduction with Linearity Assessment for Vertically Stacked Junctionless Accumulation Mode Nanowire FET AK Bansal, M Kumar, C Gupta, TB Hook, A Dixit IEEE Transactions on Electron Devices, 2018 | 20 | 2018 |
| Analytical modeling of parasitic capacitance in inserted-oxide FinFETs R Singh, A Gupta, C Gupta, AK Bansal, TB Hook, A Dixit IEEE Transactions on Electron Devices 64 (12), 5274-5278, 2017 | 11 | 2017 |
| Advances in Logic Device Scaling AK Bansal, A Dixit IETE Technical Review 32 (4), 311-318, 2015 | 9 | 2015 |
| 7-nm Nanowire FET Process Variation Modeling using Industry Standard BSIM-CMG Model R Singh, K Aditya, P Chanawala, AK Bansal, TB Hook, A Dixit 3rd International Conference on Emerging Electronics (ICEE), IIT Bombay, India, 2016 | 8 | 2016 |
| Suppression of short-channel effects by double-gate double-channel device design in normally-off AlGaN/GaN MIS-HEMTs C Gupta, A Gupta, AK Bansal, A Dixit IETE Journal of Research 67 (3), 425-432, 2021 | 4 | 2021 |
| Stressor Efficacy and Mobility Enhancement in N-Channel Nanowire FETs A Gupta, C Gupta, AK Bansal, A Dixit EDSSC 2017, Taiwan, 2017 | 4 | 2017 |
| Nanowire FET Design for 7-nm SOI-CMOS Technology I Jain, AK Bansal, A Dixit, TB Hook SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 1-3, 2015 | 3 | 2015 |
| Comparison of Heat Outflow in Dense Sub-14nm Contemporary NFETs: Bulk/SOI, Inserted-Oxide FinFET and Nanowire FET I Jain, A Gupta, AK Bansal, TB Hook, A Dixit 3rd International Conference on Emerging Electronics (ICEE), IIT Bombay, India, 2016 | 2 | 2016 |
| Gate Topologies for Mitigation of Short Channel Effects in Highly Scaled AlGaN/GaN HEMTs C Gupta, A Gupta, AK Bansal, A Dixit 2017 International Conference on Electron Devices and Solid-State Circuits …, 2017 | 1 | 2017 |
| A GIDL Perspective in 14-nm bulk & SOI MuGFETs AK Bansal, TB Hook, N Horiguchi, T Chiarella, P Raghavan, A Dixit 47th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego …, 2016 | | 2016 |
| Impact of Series Resistance in Stacked Nanowire FETs I Jain, AK Bansal, A Dixit 18th International Workshop on Physics of Semiconductor Device, IISc …, 2015 | | 2015 |
| Nanowire FET DC Parameter Extraction using BSIM-CMG Model R Singh, AK Bansal, I Jain, A Dixit 18th International Workshop on Physics of Semiconductor Devices, IISc …, 2015 | | 2015 |
Abhisek DixitNXP Chair Professor, Electrical Engineering, IIT Delhi, New Delhi, IndiaVerified email at ee.iitd.ac.in
