ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems A Nocua, F Bruguier, G Sassatelli, A Gamatie 2017 12th International Symposium on Reconfigurable Communication-centric …, 2017 | 22 | 2017 |
Multilevel simulation-based co-design of next generation HPC microprocessors L Zaourar, M Benazouz, A Mouhagir, F Jebali, T Sassolas, JC Weill, ... 2021 International Workshop on Performance Modeling, Benchmarking and …, 2021 | 8 | 2021 |
A Hybrid Power Estimation Technique to improve IP power models quality A Nocua, A Virazel, A Bosio, P Girard, C Chevalier 2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016 | 6 | 2016 |
Evaluation of heterogeneous multicore cluster architectures designed for mobile computing D Novo, A Nocua, F Bruguier, A Gamatie, G Sassatelli 2018 13th International Symposium on Reconfigurable Communication-centric …, 2018 | 4 | 2018 |
Emerging nvm technologies in main memory for energy-efficient hpc: an empirical study A Gamatié, A Nocua, JW Weloli, G Sassatelli, L Torres, D Novo, M Robert | 2 | 2019 |
A hybrid power modeling approach to enhance high-level power models A Nocua, A Virazel, A Bosio, P Girard, C Chevalier 2016 IEEE 19th International Symposium on Design and Diagnostics of …, 2016 | 2 | 2016 |
Screening small-delay defects using inter-path correlation to reduce reliability risk JL Garcia-Gervacio, A Nocua, V Champac Microelectronics Reliability 55 (6), 1005-1011, 2015 | 2 | 2015 |
A gem5 trace-driven simulator for fast architecture exploration of OpenMP workloads A Nocua, F Bruguier, G Sassatelli, A Gamatié Microprocessors and Microsystems 67, 42-55, 2019 | 1 | 2019 |
Présentation du GIP-CNFM-CIME Nanotech A Aitoumeri Abdelhamid Aitoumeri, 2023 | | 2023 |
Mont-Blanc 2020 NoC: A Low-power and High Bandwidth Network on Chip Generator PA Lagadec, S Derradji, A Nocua, Z Menyhart Microelectronic Devices and Technologies, 18, 2020 | | 2020 |
Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing: Embedded Tutorial on" DDECS-2020" A Nocua, S Derradji, G Vaumourin, PA Lagadec, Z Menyhart 2020 23rd International Symposium on Design and Diagnostics of Electronic …, 2020 | | 2020 |
Trace-driven simulation of multithreaded applications in gem5 G Sassatelli 2nd ARM Research Summit Workshop, 2017 | | 2017 |
HPET: An Efficient Hybrid Power Estimation Technique to Improve High-Level Power Characterization A Nocua, A Virazel, A Bosio, P Girard, C Chevalier Journal of Circuits, Systems and Computers 26 (08), 1740004, 2017 | | 2017 |
A Cross-Level Power Estimation Technique to Enhance High-Level Power Models Quality A Nocua, A Virazel, A Bosio, P Girard, C Chevalier Journal of Low Power Electronics 13 (1), 10-28, 2017 | | 2017 |
An efficient hybrid power modeling approach for accurate gate-level power estimation A Nocua, A Virazel, A Bosio, P Girard, C Chevalier 2015 27th International Conference on Microelectronics (ICM), 17-20, 2015 | | 2015 |
Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing A Nocua, S Derradji, G Vaumourin, PA Lagadec, Z Menyhart | | |
MB3 D3. 7–Final Report on Memory Hierarchy Investigations. Version 1.0 A Gamatie, A Nocua, RP Oliveira, PS AVL | | |
www. aspbs. com/jolpe JP Oliver, F Veirano, D Bouvier, E Boemo, A Nocua, A Virazel, A Bosio, ... Recent Advances in Low Power Asynchronous Circuit Design 280, 297, 0 | | |