Dejan Nickovic

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Oded MalerCNRS-VERIMAG, University of GrenobleVerified email at imag.fr
Ezio BartocciFaculty of Informatics, TU WienVerified email at tuwien.ac.at
Thomas HenzingerIST AustriaVerified email at ist.ac.at
Radu GrosuProfessor of Computer ScienceVerified email at tuwien.ac.at
Thomas FerrèreIST AustriaVerified email at ist.ac.at
Alexandre DonzeDecyphirVerified email at decyphir.com
Jyotirmoy V. DeshmukhAssistant Professor, University of Southern CaliforniaVerified email at usc.edu
Roberto PasseroneUniversity of TrentoVerified email at unitn.it
Alberto Sangiovanni VincentelliProfessor of EECS, University of California, BerkeleyVerified email at eecs.berkeley.edu
Kim G. LarsenDirector, Professor Aalborg UniversityVerified email at cs.aau.dk
Bernhard AichernigGraz Univ. of Technology (TU Graz)Verified email at ist.tugraz.at
Jean-Baptiste RacletInstitut de Recherche en Informatique de Toulouse (IRIT)Verified email at irit.fr
Benoît CaillaudINRIA / IRISA / U. RennesVerified email at inria.fr
Florian LorberAalborg UniversityVerified email at cs.aau.dk
Stefan JakšićScientist, Austrian Institute of TechnologyVerified email at ait.ac.at
Cristinel MateisVerified email at logic.at
Niveditha ManjunathSenior System Test Engineer, DB Netz AGVerified email at deutschebahn.com
Eugene Asarinprofesseur d'informatique, IRIF, Université de ParisVerified email at irif.fr
Georgios FainekosAssociate Professor, Arizona State UniversityVerified email at asu.edu
Sriram SankaranarayananProfessor of Computer Science, University of Colorado, BoulderVerified email at colorado.edu

Dejan Nickovic

Austrian Institute of Technology

Verified email at ait.ac.at

runtime verification cyber-physical systems contract-based design specification languages model-based testing


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Monitoring temporal properties of continuous signals O Maler, D Nickovic Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant …, 2004	921	2004
Contracts for system design A Benveniste, B Caillaud, D Nickovic, R Passerone, JB Raclet, ... Inria, 2012	278*	2012
Specification-based monitoring of cyber-physical systems: a survey on theory, tools and applications E Bartocci, J Deshmukh, A Donzé, G Fainekos, O Maler, D Ničković, ... Lectures on Runtime Verification, 135-175, 2018	212	2018
From MITL to timed automata O Maler, D Nickovic, A Pnueli Formal Modeling and Analysis of Timed Systems, 274-289, 2006	160	2006
Contracts for system design A Benveniste, B Caillaud, D Nickovic, R Passerone, JB Raclet, ... Inria, 2012	157	2012
Parametric Identification of Temporal Properties E Asarin, A Donzé, O Maler, D Nickovic International Conference on Runtime Verification, 2011	153	2011
AMT: A property-based monitoring tool for analog systems D Nickovic, O Maler Formal Modeling and Analysis of Timed Systems, 304-319, 2007	124	2007
Checking temporal properties of discrete, timed and continuous behaviors O Maler, D Nickovic, A Pnueli Pillars of computer science, 475-505, 2008	121	2008
On temporal logic and signal processing A Donzé, O Maler, E Bartocci, D Nickovic, R Grosu, S Smolka International Symposium on Automated Technology for Verification and …, 2012	98	2012
Real time temporal logic: Past, present, future O Maler, D Nickovic, A Pnueli Formal Modeling and Analysis of Timed Systems, 2-16, 2005	93	2005
Monitoring properties of analog and mixed-signal circuits O Maler, D Ničković International Journal on Software Tools for Technology Transfer 15 (3), 247-268, 2013	92	2013
Time for mutants—model-based mutation testing with timed automata BK Aichernig, F Lorber, D Ničković International Conference on Tests and Proofs, 20-38, 2013	84	2013
Quantitative monitoring of STL with edit distance S Jakšić, E Bartocci, R Grosu, T Nguyen, D Ničković Formal methods in system design 53 (1), 83-112, 2018	73	2018
From Mtl to Deterministic Timed Automata D Ničković, N Piterman International Conference on Formal Modeling and Analysis of Timed Systems …, 2010	63	2010
Contracts for systems design: Theory A Benveniste, B Caillaud, D Nickovic, R Passerone, JB Raclet, ... Inria Rennes Bretagne Atlantique; INRIA, 2015	55	2015
On synthesizing controllers from bounded-response properties O Maler, D Nickovic, A Pnueli Proceedings of the 19th international conference on Computer aided …, 2007	50	2007
From signal temporal logic to FPGA monitors S Jakšić, E Bartocci, R Grosu, R Kloibhofer, T Nguyen, D Ničkovié 2015 ACM/IEEE International Conference on Formal Methods and Models for …, 2015	48	2015
Temporal logic as filtering A Rodionova, E Bartocci, D Nickovic, R Grosu Proceedings of the 19th International Conference on Hybrid Systems …, 2016	43	2016
A survey of challenges for runtime verification from advanced application domains (beyond software) C Sánchez, G Schneider, W Ahrendt, E Bartocci, D Bianculli, C Colombo, ... Formal Methods in System Design 54 (3), 279-335, 2019	42	2019
Second international competition on runtime verification Y Falcone, D Ničković, G Reger, D Thoma Runtime Verification, 405-422, 2015	41	2015

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